A Two-Stage Current Limiting Control Strategy for Improved Low-Voltage Ride-Through Capability of Direct-Droop-Controlled, Grid-Forming Inverters

This paper describes a two-stage current limiting control strategy to improve the low-voltage ride-through capability of direct-droop-controlled, grid-forming inverters. When a low-voltage event occurs, the Stage 1 current limiting control rapidly clamps the magnitude of output current at its maximum allowable limit during transients by immediately blocking the insulated-gate bipolar transistors (IGBTs) using a hysteresis loop, and the Stage 2 current limiting control limits the output current at its maximum allowable limit in the steady state by regulating the magnitude and angular frequency of the modulation waveform using the outer active and reactive current control loops. The main advantages of the two-stage current limiting control include: a) it can limit the overcurrent within a few pulse-width modulation cycles once the fault happens, which is critical to protect IGBTs from being damaged and b) it can maintain the synchronism of the grid-forming inverter to the grid under long-term low-voltage events. The control strategy has been tested under various disturbances in the PSCAD/EMTDC electromagnetic transient simulation environment.