Static nonlinear errors compensation for RF front-end circuit on high speed RF sampling (Ti)ADCs

RF receivers can be divided into two main parts: the RF front-end circuit and the quantization part. In wideband receiver technology, the direct RF digitization architecture is extensively used. This allows for the digitization of the entire bandwidth before any processing, but it places significant demands on the RF front-end circuit. Active components such as Low Noise Amplifier (LNA) and Track & Hold (THA) can introduce nonlinear errors that propagate throughout the sampling and quantization process.Purpose: The aim of our work is to develop a background solution for estimating and correcting these errors primarily through digital calculations. We are investigating the potential benefits and limitations of dithering methods to determine their compatibility with the analog constraints imposed by the RF front-end circuit.Methods: We represent the static nonlinear errors using a third-order polynomial model. We develop an estimation algorithm utilizing the dithering method to determine the coefficients of this polynomial. We examine the implications of the errors introduced during the incorporation of the dithering signals.Results: Our study shows that the estimation algorithm works when the errors on the dithering signals are ignored. The practical limitations depend on the necessary accuracy of the dithering signals for the estimation algorithm to function effectively, in comparison to the achievable accuracy on real circuits.