An $8.73\mathrm{G}\Omega$ Input Impedance VCO-Based Neural Front-End with Autonomous Time-Domain Impedance Boosting Technique and Maximum 0.215s Re-Calibration Time

Wearable and implantable electrophysiological sensors with integrated readout circuits provide compact solutions for biomedical applications. However, dry electrodes or integrated miniaturized electrodes used in these devices exhibit high interface impedance, therefore require readout circuits with even higher input impedance to prevent severe signal attenuation or CMRR degradation. This is more challenging for capacitively-coupled instrumentation amplifiers (CCIA), which is the most popular structure for power and area constrained designs. Negative capacitance or positive feedback technique has been widely used to compensate the impedance degradation due to coupling capacitors. However, because of the parasitics and random mismatch, precise compensation is challenging and over-compensation can cause instability of the frontends. Therefore, foreground self-calibration scheme with programmable positive feedback DAC has been introduced recently to tune the positive feedback strength for compensation of the input current [1]–[3], thus the input impedance could be maximumly boosted. However, the calibration procedure usually requires a calibration signal to switch into the signal chain and perform fore-ground calibration with tens of seconds calibration time. Moreover, the extra switches and calibration signal generator will take extra silicon area and power budget, as well as introducing extra parasitics. A calibration scheme based on the thermal noise and voltage thresholding is proposed without extra calibration signal, but reference generator and comparators are required with extra silicon area and accuracy requirement [4].