Design of the digital readout of the prototype SparkPix-RT ASIC with variable data velocity

This paper describes the design of the digital readout of the prototype SparkPix-RT ASIC. This joint ANL-SLAC development aims to demonstrate an approach to increase detector frame rates using on-chip compression to reduce the amount of streaming data from a pixel matrix prior to being transmitted off-chip. However, compression can result in variable latency, whereas scientific detectors must operate in real-time (i.e., stall-free) to support continuous streaming of sampled data. We present one solution in the prototype SparkPix-RT ASIC design of the readout block which allows variable rate compressed data to be transmitted off-chip over fixed bandwidth serial channels.