Built in Self Test on Random Test Pattern Generation for Test Compression

Since it is utilized to test every operating function inside the IC circuit, BIST is regarded as a benefit in all ICs. Since it uses more power and a separate circuit, it is not necessary to test the IC's operations in this way. Utilizing the BIST lowers the extra circuit's power usage. Despite the fact that it minimizes the power consumption of extra circuits, it still uses a lot of electricity. There are several ways to solve the issue of power utilzation, but there is no way to lower it. Although PRPG is an important method used for power reduction techniques which is used in BIST since it provides pseudo-random patterns for testing, it also consumes a significant amount of power because of pattern switching and repetition. BIST is created using RTPG to get around the problems that toggling and repetition now provide. The RTPG uses MISR to cut down on duplication. MISR steers clear of pattern repetition. The pattern is decreased to lower the power use. So, the power usage is decreased while implementing our suggested solution.