Discrete Packaged Power Diode's Electro-Thermal Behaviour Modelling Method In A Standard CAD Environment

A power device Electro-Thermal (ET) simulation tool is presented in this article. Power devices are subjected to thermal issues that we address thanks to an original modelling method. It is based on lumped-element modelling using Verilog-A models which demonstrated promising results in previous work for a silicon Schottky die. In addition to the promising results, this approach has made it possible to dramatically reduce computational resources compared to traditional Technology Computer-Aided Design tools. These computational resources reduction allowed us to take into account the packaging of the device as it has a significant role in the ET behaviour because of its thermal capacity.