A Compact Model of FDSOI based 1-T Pixel Sensor for Design of In-sensor Computing

A compact model for photoresponse of Fully-Depleted Silicon-on-Insulator (FDSOI) based one-transistor (1-T) pixel sensor is proposed for the design of in-sensor computing. The model describes the photoresponse as the photoelectrons charging the device equivalent capacitors to obtain the threshold voltage (V
th
) change and it is verified by both the TCAD and device in 22nm FDSOI technology node. By integrating the model into BSIM-IMG, the accuracy of array-scale in-sensor Vector-Matrix Multiplication (VMM) affected by device doping variation is evaluated using HSPICE.