DSP Architectures of Covariance Intersection Fusion Algorithm for Automotive Sensor Fusion

The data fusion from sensors within the automotive vehicle is vital for improved accuracy and safety. The centralized and information matrix fusion (IMF) algorithms are famous for providing an optimal fusion estimate. However, the IMF is not viable in automotive sensor fusion applications due to the limited bandwidth and low hardware resources. Hence, distributed fusion technology is widely adopted in the automotive sensor applications to achieve high-speed and low-area realizations. This paper proposes three digital signal processing (DSP) architectures for covariance intersection (CI) fusion algorithm: Pipelined-traditional CI, adder-ladder CI, and pipelined adder-ladder CI. The proposed DSP architectures are evaluated with hardware resource consumption (multipliers, adders, and delays), maximum achievable frequency, and latency of the architecture. In addition, proposed CI algorithms for Digital Signal Processing (DSP) architectures are compared with IMF DSP architectures. The hardware resources and optimal pipeline stages required for CI with respect to N number of sensors are provided. The traditional pipeline algorithm requires N number of stages where as the proposed pipelined version of adder-ladder CI requires a N−1 pipeline stage with additional 7N−1 and 7N−3 delay elements for even and odd number of sensors to achieve the overall system operating frequency to an operation of multiplier. The proposed DSP architectures are suitable for automotive sensor fusion due to their high operating frequency and low hardware resources.