Patterning of Monolithic Integrated Circuit using Electron Beam Lithography

This paper presents the technique and procedures of fabricating micro sized monolithic integrated circuit (MIC) using electron beam lithography (EBL). In order to realize a small circuit sizes device by EBL, several steps need to be carried out. These include sample cleaning, resist coating, pattern generation, initial beam focus and stigmation correction, sample calibration, write-field calibration, re-correction of beam focus and stigmation condition, pattern exposure and development process. It was found that a narrow transmission line of $0.6 \mu \mathrm{m}$ width can be obtained by EBL process using the following exposure parameters; 20 keV acceleration voltage, 0.15 nA beam current and 150 m As/cm$^{2}$ exposure dosage with a dose factor of three and write field magnification of $\times 150$.