Design and implementation of embedded PCB defect detection system based on FPGA

Aiming at the problem that the convolutional neural network commonly used in PCB defect detection is difficult to deploy in embedded devices with limited resources, an FPGA embedded system is designed to realize the hardware deployment of YOLOv3 neural network for PCB defect detection. The system is mainly designed from two aspects. The deep learning processing unit DPU is designed on the hardware side to quickly process the convolution calculation part of the neural network and configure the system software for it. At the algorithm side, the model is compressed by using a quantization method to reduce the computational complexity of the model and generate a DPU deployable model. The experimental results show that the designed system can still maintain the accuracy of 0.789 in PCB defect detection. At the same time, the convolution calculation throughput of 2.44TOPS and the detection speed of 97.59ms per frame delay are realized under low power consumption, which is suitable for industrial PCB defect detection.