A 0.1-3 GHz 0.5W two-stage quadruple-stacked CMOS Power PA

A 0.1-3 GHz broadband radio frequency (RF) power amplifier (PA) based on complementary metal oxide semiconductor (CMOS) technology is designed in this article. a two-stage quadruple-stacked structure with combinations of matching resistor and feedback resistor is employed to achieve a high power output. Measurement results show that this PA gain flatness of 30±1.2 dB, the maximum input return loss (S11) is less than -11 dB and the maximum output return loss (S22) is less than -11 dB. At 1.5 GHz, the saturated output power is up to 27 dBm, and power added efficiency (PAE) is 23%.