An Improved DVB-S2 Phase Coarse Synchronization Algorithm and Its FPGA Implementation

This paper proposes an improved phase coarse synchronization algorithm, which can be applied to the DVB-S2 system. The improved algorithm can handle the uncorrected residual frequency offset from the frequency synchronization module. Compared with the original algorithm, the residual frequency offset is nearly doubled threshold, and reduces the complexity of FPGA implementation and saves hardware resource overhead. The scheme is implemented on Xilinx Virtex-7 VC709 field programmable gate array, and simulation verifies that the scheme can achieve bit error performance below 10
^-7
within the supported residual frequency offset range.