System-level Innovation for the Next Decade AI Performance, Power, Area with Co-optimization

Power, performance, and area (PPA) are three key parameters in conventional system-on-chip design optimization. In post Moore’s law era, system-level PPA improvement for system-of-chips/chiplets – a new "SoC" – relies on multi-disciplinary AI co-optimization across full stack innovations including process-in memory, edge intelligent sensing and heterogenous integration.