Circuit Design of a Novel Analog Multiplier

Multipliers are extensively utilized in circuit design across various applications. Generally, there are two types of multiplication circuits available. The first type is the digital multiplier used in digital circuits, which requires the addition of power-consuming A/D (D/A) converters. The second type is the analog multiplier represented by the Gilbert multiplier, which operates solely in high-frequency circuits and has specific requirements for input and output signals. Multiplication plays a vital role in the hardware implementation of artificial intelligence algorithm training. However, the current multiplication circuits are not suitable for this specific circuit design scenario. To address the limitations of current multiplication circuits, this paper proposes a novel analog multiplier. The proposed multiplier in this paper consists of three main components: the absolute value circuit, the multiplication operation circuit, and the sign operation circuit. Firstly, the input voltage is passed through the absolute value circuit to obtain its absolute value. Then, the unsigned multiplication operation is performed using the multiplication operation circuit. Finally, the sign operation circuit adds the appropriate sign to the unsigned result and completes the output. The circuit is simulated and analyzed using PSPICE. It achieves an input voltage range of -10V to +10V and an output range reaches tens of volts. In comparison to traditional circuits, the proposed analog multiplier presented in this paper offers a significantly wider input and output range. Furthermore, its precision can be adjusted by adding circuit components. This paper introduces a novel technical approach for the design of a fully hardware-implemented multiplication circuit in artificial intelligence algorithm training.