Design of a Broadband Low-Noise Amplifier Operating at 8-10 GHz with High Gain and Favorable Gain Flatness

A broadband low-noise amplifier (LNA) designed for the 8-10GHz wireless communication frequency range was developed based on the 180nm CMOS process. The overall circuit adopts a two-stage self-biasing common source-common gate (cascode) structure to improve gain. A parallel feedback circuit is employed to extend the bandwidth, and gain compensation techniques are utilized for interstage matching to improve gain flatness. The simulation results show that within the range of 8-10GHz, the gain is greater than 26.63dB, a flatness fluctuation of
$\boldsymbol{\pm 0.44}\mathbf{dB}$
, and a maximum noise figure below 2.78dB. The power consumption is 18.2mW, and the chip area is
$\boldsymbol{529.21} \mathbf{um} \times \mathbf{5 8 9. 5 3 u m}$
include RF pad.