Analyzing Wideband Computational Time Delay for Phased Arrays After Direct Carrier Sampling

New technologies are providing unprecedentedly high sample rates for converting multiple analog streams into digital formats for real time digital signal processing. High-speed analog conversion allows digital implementations of transformations that were previously only practical with analog circuits. With new capabilities in digital signal processing architectures comes new engineering trade-offs to explore. This paper examines the computational implementation of wideband time delay inside the field programmable gate array portion of a GHz sample rate system-on-chip device using a polyphase FIR filter architecture to interpolate high speed data in real time. Since the quality of the time delay operator is a key performance metric of phased array technologies used in radar, communications, remote sensing, and radio astronomy, innovations to the implementation of the time delay operator can benefit all of these technologies.