A High Linear 30 GHz Low Noise Amplifier for 5G Application in 45 nm CMOS Technology

As low noise amplifier (LNA) being an important element in the receiver circuit, it should poses good performance characteristics like minimum noise, high gain and good linearity. In high frequency applications like 5G frequency bands, the LNA suffers from increased noise and reduced gain; also conventionally LNA is a non-linear circuit it has increased intermodulation distortion (IIP3). This paper presents a high linear 30 GHz CMOS LNA with the optimization technique of pre-distortion is to enhance the linearity minimal noise figure (NF) and increased gain. In addition, the input stage is optimized for noise performance to achieve minimum noise figure. The amplifier is designed and implemented in 45nm CMOS technology and the simulation results shows that the design obtains a NF of 3.4 dB, gain of 20 dB and IIP3 of 4 dB with supply voltage 1.2V.