Improvement of Standby Current Failure by Device Optimization on 4XNM ETOX NOR-Flash Memory

The self-aligned STI technique is used for the fabrication of ETOX (Erase through oxide) NOR-flash as the feature size scaling to 4Xnm node owing to the advantages in improving the poly gap-filling window and eliminating the floating gate poly residue. In this paper, the failure mode of standby current was characterized by the WAT test, junction stain analysis and TCAD simulation. The poor performance of well/well isolation is attributed to the inordinate diffusion of p-type implanted ion because of the additional thermal budget. At last, the failure ratio of standby current and isolation BV performance can see significant boost by optimizing the HVP-well filed implantation condition determined by the simulation and experiment results.