An Adaptive Controlled Chip-Level Wireless Power Transfer System with DPID Controller for Wireless 3-D Stacked Chips

In this paper, we presented an adaptive controlled chip-level wireless power transfer (WPT) system with a digital proportional-Integral-derivative (DPID) controller for next generation of high-density wireless three-dimensional (3-D) stacked semiconductor technology. The WPT is designed in UMC 55 nm CMOS process with an area of 0.3 mm
²
. Simulation result shows the received power is controllable varying from 0 to the peak value of 43mW with a settling time less than 2 us from a 2.5 V power supply. It achieves 15% power efficiency and over 90% of power utilization ratio.