An Effective Parallel Acceleration Method for Transient Simulation of Large-Scale Power Ground Network

With the improvement of integrated circuit technique, chips have developed from large-scale to very large-scale integration (VLSI). The design of power/ground (P/G) network becomes a key factor limiting chip's rapid development, especially in the design of VLSI. Some classical algorithms, such as random walk, become difficult to perform transient simulation as the scale of P/G increases. In this paper, fast sparse matrix addition and distributed parallel acceleration method is proposed to accelerate transient analysis of P/G network without considering the specific topology of the network. Compared to the single-process solver, transient analysis of a P/G network example with around 5 million nodes can be accelerated 2.69X times by the proposed method, while keeping a high-precision solution.