An Automated Propagation Approach that Promotes and Demotes the Timing Exception Between Hierarchical Blocks and Flat Design

An automated propagation approach is presented to achieve the timing constraint promotion and demotion between hierarchical blocks and flat design. The propagation scheme deals with several types of timing constraints, such as timing exceptions, clock definitions and boundary conditions. To simplify the classification, the propagation scheme divides the timing constraints into a few groups so that the promotion and demotion methodology of each group can propagate kinds of timing constraint types, which have similar options and grammar. In other words, each group reuses one promotion and demotion algorithm to propagate several timing constraints between hierarchical blocks and flat design. In particular, this paper focuses on the timing exception's promotion and demotion algorithm, which combines a new Breadth First Search(BFS) with a new Depth First Search(DFS) to adapt the graph structure of real circuit and realize high accuracy and high efficiency as well. The DFS method is improved in aspect of timing path traversing. Based on the character of timing path, a new strategy is applied to avoid to traverse the fake path, in which there isn't a connection between part of nodes at current depth level but there is connection among the nodes at next depth level. On the other hand, the proposed new BFS approach uses a parallel process to achieve high speed. To verify the performance of the proposed propagation scheme, an experimental environment is built. The test environment is utilized to evaluate the circuit design in terms of accuracy and efficiency. In addition, the circuit is a signoff design and the timing constraints contain different timing paths and structural complexities. The experimental result shows that the proposed approach can accurately propagate the timing constraints between hierarchical blocks and flat design. It also performs robustness character according to various timing exceptions. Moreover, the combined BFS & DFS algorithm reduces by about 40% runtime compared to DFS method.