An Improved PWM Method of Zero-Sequence Circulating Current Control in Parallel Inverters

Inverters with a parallel structure are an effective solution to increase the system's power capacity. However, low-frequency zero-sequence circulating current (ZSCC), which degrades the output current quality and increases the power losses, might arise due to the unequal zero-sequence voltages generated by parallel inverters. To overcome this issue, this paper presents an improved pulse width modulation (PWM) method to suppress the zero-sequence circulating current in parallel three-phase inverters. The proposed modulation method can be simply and flexibly embedded into the classical voltage-oriented control (VOC) architecture with minimum modification, and ZSCC can be effectively regulated around zero. The proposed solution removes the zero-sequence loop controller, simplifying the control structure and making it very friendly to implement from the engineering perspective. In the end, experimental results validate the effectiveness of the proposed method.