A Capacitor-less Low Drop-out Regulator with Improved Slew-Rate Enhancer Circuit Flipped Voltage Follower

In this study, an off-chip capacitor-less low drop-out regulator (LDO) with an improved slew-rate enhancer (ISRE) circuit and a flipped voltage follower (FVF) is presented. The ISRE circuit is proposed to enhance the transient response speed of the low drop-out regulator. It uses a bandgap reference and transistors in series for biasing, which not only increases the charge/discharge current but also greatly reduces the chip area. Moreover, an active feed-forward compensation circuit is added to the FVF loop to improve the phase margin. The FVF-LDO implemented in the 0.1S$\mu$m CMOS process has an output voltage of 1. 2V and a minimum dropout of 200mV. Furthermore, when the load current is stepped from 0 to 50mA in 100ns, the voltage spikes are 107mV and 213mV, respectively. Finally, the area is only 0.0136m$m^{2}$ of the proposed LDO.