Analysis of Network on Chip Topologies

The incorporation of multi-core processors using current technologies is a challenging task as establishing effective communication among distant cores consumes significant time, ultimately diminishing the benefits of multi-core functionality. A new technology called Network on Chip (NoC) has been introduced to address this issue and is considered the future of the semiconductor industry. To develop new multi-core processors that outperform existing processors, it is crucial to compare traditional technologies with NoC. The traditional method faces difficulties implementing multi-core systems effectively and establishing efficient communication among different logic units, making NoC a helpful tool for developing multi-core processors. A detailed study of the NoC architecture is necessary, including the understanding of each component of its basic building blocks, such as topology, flow control mechanisms, routing logic, and router micro-architecture, and their performance comparison. This understanding is critical to select the most appropriate NoC architecture for implementing multi-core processors.