Design and Comparative Analysis of Open Core Protocol and Advanced Extensible Interface Protocol

On today’s platforms, on-chip communication between the peripherals has become of the utmost importance. As the density of the System on Chip (SoC) increases, testing the design becomes harder as it adds up to human errors. Advanced eXtensible Interface (AXI) is the bus architecture of advanced microcontrollers that is widely used for communication between low- and high-bandwidth peripherals. Open Core Protocol (OCP) is also one of the on-chip protocols that establishes transactions with low meta-stability. This work mainly focuses on understanding the communication on a SoC using the AXI and OC protocols. Both the AXI and OCP designs use the three-state model designed using FSM, and the outputs are observed for fixed burst, incremental burst, and wrapping burst in the case of AXI and incremental burst, wrapping burst, exclusive OR burst, streaming burst, and 2-dimensional block burst in the case of the OC protocol. The design and the test bench are simulated, and the simulation waveforms are analysed using the Cadence Xcelium EDA tool. Both protocols are implemented on the Basys 3 FPGA board, and certain parameters like area and time are analysed. It is found that the OC protocol has less metastability with a setup-hold window in the range of 0 ns to 0.3 ns, whereas AXI has a setup-hold window in the range of 4 ns to 4.5 ns. As OCP supports five types of burst transfers and AXI supports three types of burst transfers, which take fewer internal signals, the device utilisation of OCP is increased by 44.4% compared with AXI.