All-Digital Time Integrator with Bi-Directional Gated Ring Oscillator / Shift Register

This paper proposes an all-digital time integrator consisting of a 9-stage bi-directional gated ring oscillator (BD-GRO) and a 16-stage bi-directional shift-register (BDSR) up-down counter. The BDGRO performs time integration whereas the BDSR counter digitizes the result of time integration. The time integrator features a low resolution of the per-stage-delay of the BDGRO, low power consumption, inherent dynamic element matching, self-digitization, and full technology compatibility. The time integrator is designed in a TSMC 130 nm 1.2 V CMOS technology and analyzed using Spectre with BSIM3 device models. The performance of the time integrator is assessed using simulation results.