Common-Gate Zero Current Detector with Body-Voltage Based Offset Compensation

A zero-current-detector (ZCD) circuit is usually required in switching dc/dc converters to enable low current mode operations such as discontinuous-current-mode. The ZCD input offset arising from process variations and components mismatch makes the converter switch with a non-zero inductor current, reducing the overall conversion efficiency. This paper presents a ZCD structure that ensures fast and accurate zero-crossing detection of the inductor current by checking the drain-source voltage of the low-side switch. The proposed offset correction technique acts on the body voltage of two NMOS of the comparator, sensing the output current of a differential pair during the first phase. In the comparison phase, the corrected body voltage value is stored in a holding capacitor, drastically lowering the ZCD input referred offset. The effectiveness of this technique has been proved with transistor-level simulation in a BCD technology with 180nm CMOS. The input referred offset of the same ZCD topology, implemented with and without the proposed correction method, has been reduced by about a factor of 30.