A Transient Response Improved Output Capacitorless LDO

In this paper, a transient response improved output capacitorless low dropout regulator is designed in standard 0.13 $\mu$m CMOS technology. A method based on adaptively sense network (ASN) to increase the slew rate and provide extra discharge loop is adopted, which suppresses the undershoot and overshoot of output voltage. Simulation results reveal that the output voltage undershoot and overshoot is 97.03 mV and 140.87 mV, when load current step from 10 $\mu$A to 30 mA with the edge time is 100 ns, respectively. And the output voltage recovery time is less than 0.35 $\mu$s, the fast settle time is also achieved. Besides, the linear regulation of load and supply voltage is 0.043 mV/mA and 1.467 mV/V.