Implementation of Area Efficient Adders for Inexact Computing

In recent years the archetype of approximate computing is very much highlighted for satisfying the never ending requirement of decreasing power utilization in modern electronic devices. The application domain of multimedia signal processing with complex computations represents a typical trade-off between power and quality in inexact computing. Adder is backbone of digital VLSI circuits. For high mathematical complexity applications, approximate adders are proposed as a feasible solution in this paper, which can give a better trade-off with accuracy in terms of energy consumed, area occupied and delay. We present in this work that the efficiency of the Approximate Ripple Carry Adder (ARCA) 75%, 50% and 25% accuracy is achieved with better speed, reduced area and power consumption as a trade-off. Our work reflects the fact that by sacrificing efficiency to a tolerable limit we reduce area as compared with the existing conventional RCAs.