Setup and Hold Time Analysis of D Flip-Flop based on CMOS and GNRFET

Graphene Nano Ribbon (GNR) based transistor can be considered as one of the alternative for the silicon elements for future integrated circuits. This paper introduces design and characterization of sequential circuit based on Graphene Nano-Ribbon Field-Effect Transistors (GNRFETs) as well as CMOS. Circuit simulation and analysis is done using Synopsys HSPICE simulator.Pass Transistor Logic (PTL) based D-flip-flopis designed for clock frequency of 4GHz. The proposed GNRFET PTL based D Flip-flop shows notable performance improvement in comparison with the conventional CMOS based technology.Setup time and hold time analysis is also performed and compared.