Analysis of Current-Mode Logic D-Type Flip-Flop 1:2 Frequency Dividers

We analyze the nonlinear dynamics of current-mode logic D-type flip-flop 1:2 frequency dividers using a periodically forced second-order nonlinear differential equation. From the analysis, we derive the key design parameters of the divider including precise formulas for the locking interval, the self-oscillating frequency, and the amplitude of self-oscillations. In addition, phase noise, which is one important aspect of modern broadband standards, has been accurately quantified. The formulas are validated by simulations using SPICE and Matlab
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