Research on Hardware System of APWL Algorithm Based on FPGA

This paper proposes an improved piecewise linear based on the definition of Grunwald-Letnikov, and designs the FPGA implementation scheme of the algorithm. Compared with the previous PWL method, the main advantages of the design in this paper are that the calculation precision of fractional calculus is improved, and the consumption of FPGA hardware resources is greatly reduced. Finally, the algorithm and hardware implementation scheme are verified respectively in Matlab software and digital oscilloscope experiment platform based on FPGA.