Improved Linearity CMOS Differential Amplifier with Low-Voltage Low-Power Operation

A new linearization technique for improving the performance of the CMOS differential amplifier circuit will be presented. The new method allows strongly improving the linearity of the differential structure, as well as to extend the maximal range of the differential input amplitude. The original proposed technique is based on a proper current biasing of the differential core, at a current that is a sum of two components: a constant current and an additional current, proportional to the square of the differential input voltage. The original method will also reduce the overall circuit distortions and will strongly increase the bandwidth of the differential structure. The circuit is designed for low-voltage low-power operation, having a minimal supply voltage of 1.5V. The maximal range of the differential input voltage is about 200mV. SPICE simulations confirm the theoretical estimated results, showing an excellent behaviour of the proposed differential circuit.