Interface tailoring for CMOS, cryogenic electronics, and beyond

We have tailored high-
$\kappa$
/
$epi$
-Si/Ge and /InGaAs interfaces, whose electronic structures were elucidated based on our understanding of the surface electronic structures of Ge, SiGe,
$epi$
-Si/Ge, (In)GaAs. Low interface trap densities (
$D_{it}$
's) of
$(2-4)\times 10^{11}\text{eV}^{-1}\text{cm}^{-2}$
and small charge trapping with a high acceleration factor
$\gamma=11$
were achieved simultaneously in the Ge MOS. We have achieved record low subthreshold slopes (SS) of 22 mV/dec at 77K and
$D_{it}$
's in the high-
$\kappa$
/(In)GaAs planar InGaAs MOSFETs. Superconducting Al films epitaxially grown on sapphire have shown > 1M internal quality factor in the resonators.