The Impact of Nano CMOS Device Scaling on High Frequency Performance and Optimization Principle for fMAX Boost

In this paper, the impact of nano CMOS technology scaling on the high frequency performance aimed at super-350 GHz f
T
and
$\mathrm{f}_{\text{MAX}}$
has been investigated. An extensive comparison of multi-finger (MF) nMOSFETs designed and fabricated in 90-nm and 40-nm technologies indicate 71∼128% boost of f
T
but only 11∼49% increase of
$\mathrm{f}_{\text{MAX}}$
in three MF nMOSFETs when scaling from 90-nm to 40-nm technologies. The undesired increase of gate impedance and output conductance caused by device scaling appear as the root causes, which limit the enhancement of
$\mathrm{f}_{\text{MAX}}$
. This important finding provides a useful guideline for the simultaneous boost and optimization of f
T
and
$\mathrm{f}_{\text{MAX}}$
aimed at mm-Wave and sub-THz CMOS circuits design.