Closed-Loop Stability Analysis of Digitally Current Mode Controlled Three-level Buck Converter using A Simplified Discrete-Time Modeling Framework

Primary challenge in a digitally controlled three-level buck converter (3LBC) is to identify suitable modeling, analysis, and design techniques, keeping in mind simplicity and accuracy, in presence of sampling delay and additional flying capacitor dynamics. Using a discrete-time (DT) framework, this paper develops a generic full-order large-signal model, which is accurate and takes into account the structural change of the statespace model during the flying capacitor reconfiguration. However, owing to the mathematical complexity of full-order model, this paper also develops a generic and simple reduced-order largesignal DT model, which is as accurate as the full-order model. Accuracy of the reduced-order model is compared with the fullorder model, both in large-signal and small-signal scenarios in SIMPLIS environment. A mixed-signal peak current-mode control with active balancing of flying capacitor voltage is proposed. Using the small-signal DT model, analytical stability criteria are developed for inductor current dynamics, flying capacitor voltage dynamics and closed-loop converter dynamics. Analytical stability criteria are verified using SIMPLIS simulation and experimental results through a 12 V to 1 V, 500 kHz, 3LBC hardware prototype. The proposed modeling framework will be helpful for stability analysis and direct digital control design.

I. Introduction

Three-level buck converter (3LBC), is a popular choice for a wide variety of low voltage and low power applications [1]–[3]. Various control techniques were developed with and with-out sensing flying capacitor voltage [4]-[10]. On the contrary, there has been little emphasis on the stability analysis of 3LBC. Some efforts were made in the past by considering continuous-time(CT) small-signal modeling techniques [11], [12]. While such techniques may yield satisfactory results in the small-signal sense, they may not be accurate enough for digitally controlled 3LBCs for properly predicting fast-scale instability, which may lead to various nonlinear phenomena [13]-[16]. A recent study on peak and valley current mode control in 3LBC highlights various stability properties [17]; however, to the best of our knowledge, efforts are not made so far to develop an accurate, yet simplified discrete-time (DT) framework to carry out stability analysis. Further, the effects of sampling delay and flying cap dynamics have not been reported so far. This paper develops both full-order as well as reduced-order DT modeling frameworks for stability analysis of a 3LBC under the proposed fixed-frequency mixed-signal peak current-mode control (MSPCMC) technique with active balancing of flying capacitor voltage. The simplified reduced-order DT model is shown to be as accurate as its full-order DT model counterpart and is helpful for digital control design.