Drive Cycle Based Speed Control of BLDC Motor Using Pulse Width Modulation

In this work, the design techniques of Field Pro-grammable Gate Arrays (FPGAs) are shown, with an emphasis on motor drive applications. Even though motors are at the centre of many motion/drive control and industrial automation applications, regulating their speeds can be difficult. Because of its low maintenance requirements, compact size, and great efficiency, the brushless DC (BLDC) motor is a promising new type of motor. An FPGA-based solution for speed regulation of an inverter-fed BLDC motor is presented here. Both open- and closed-loop speed control simulations are performed to validate the suggested approach. The accuracy of these simulations is double checked using a full-scale experimental setup in the lab. It has been noticed that the transient and steady-state response of BLDC motor speed control is enhanced by the use of a closed loop technique based on FPGAs.