Advanced PWM Scheme For 15 Level Binary Source (1:2:4) Inverter

In order to enhance the inverter performance, a novel architecture is developed in this study with minimal component count and source. The proposed 15 level binary source inverter (15LBSI) utilize three dc source in the sequence of (1:2:4). Compared to typical inverters, this architecture requires fewer components, fewer gate drivers. The gate signal for proposed architecture is developed using advanced PWM schemes which includes trapezoidal modulating wave and traditional triangular carrier wave with variable magnitude. The level shifted PWM schemes are utilize to develop triggering pulses for the 15LBSI. Performance indicators including Total Harmonic Distortion (THD), RMS voltage (fundamental), crest factor (CF), form factor (FF), and distortion factor (DF) are assessed for various modulation indices. MATLAB-SIMULINK is utilized for the simulation study.