A Low Power Feedback Cutting 8T SRAM Cell for Improved Stability

This paper presents a feed-back cutting 8T (FC8T) SRAM for stability enhancement and to mitigate the power consumption. The design specifications such as noise margin, power, and delay are considered for comparison. For the performance evaluation of the proposed FC8T SRAM (PFC8T), it is compared with conventional6T, conventional8T, MG8T, and Kushwa8T SRAM. The results clearly states that the PFC8T SRAM achieves low power utilization during read, write and hold operations compared to existing cells. Furthermore, it maintains a high static noise margin in all modes. This cell shows 45.5%, 42.78%, 20.77%, and 26.95% improvement for leakage power when compared to conventional6T, 8T, MG8T, and Kushwa 8T SRAM respectively. All the simulations are carried out at 1.2 V voltage supply, using CMOS 90nm technology. Hence, the PFC8T SRAM cell design is efficient for low-power applications.