Global-to-local finite element model of shear stress analysis on Fan-out wafer-level package

Wafer-level packaging has become one of the semiconductor industry’s most efficient packaging technologies due to its advantages in terms of size reduction and reliability improvement. In wafer-level packaging, unlike the traditional packaging technique, the silicon dies are encapsulated by epoxy molding compound first while at wafer-level before dicing into individual package. The package undergoes several high-temperature fabrication processes which may induce high stresses on the materials’ interfaces. Interfacial failure is a common issue in semiconductor packages. Finite element analysis has become one of the most widely used approaches in analyzing potential interfacial failures in semiconductor packages. But for the wafer-level package, the molded wafer has a large diameter with very thin multiple components. Using conventional finite element modeling of the whole molded wafer may consume immense computational cost since it involves a large number of mesh elements to achieve reliable results. In this study, a global-to-local finite element modeling technique was carried out to evaluate the potential interfacial failure in a fan-out wafer-level package. The analysis was right after the post-mold curing of the glass wafer. The thermomechanical loads were applied to the glass wafer during global modeling. Then, using the imported solutions from the global model as boundary constraints, local modeling (or sub-modeling) was carried out to have a more detailed stress analysis and investigation of the critical region. The potential interfacial failure was assessed based on the available adhesion strength of the material. Moreover, the finite element model was validated through wafer warpage comparison to the existing experimental measurement using Shadow Moiré.