A 24-41 GHz GaN Low-Noise Amplifier with Cascode Structure and Multi-Stage Load

This paper presents a 24-41 GHz broadband low-noise amplifier (LNA) using a 100-nm gallium nitride on silicon (GaN-on-Si) process. The wideband LNA is based on a two-stage cascode amplifier which employs a multi-stage transmission line load and symmetrical cascode structure to boost the gain at high frequencies. The proposed LNA exhibits a noise figure of 1.51-2.42 dB and a high gain of 20.1-23.3 dB from 24 to 41 GHz, with input and output return losses less than -10 dB in the whole broadband. The output-referred 1-dB compression point (P
1dB
) is 11.7-13.3 dBm. The DC power consumption is 400 mW and the chip area is 2.1×0.85 mm
²
. The proposed two-stage LNA shows well-balanced performance of gain and bandwidth.