Codesign of S Band Integrated GaAs PIN- diodes Limiter and Low Noise Amplifier

This paper introduces the design of a high-power limited low noise amplifier (LNA) that operates at 2.7-3.5 GHz. The hybrid integrated circuit scheme and micro-assembly process are used to realize the circuit. Based on the negative feedback circuit, the gain flatness and noise performance of the single-ended LNA are improved. The balanced structure of limiter and LNA enables us to obtain better matching characteristics and increase the power resistance. The designed balanced limiter-LNA has a noise figure (NF) below 1.35dB and a small signal gain higher than 27.5 dB with flatness less than 1dB. The output power at 1 dB compression point (OP1dB) is larger than 17 dBm. The input and output return loss is greater than 15dB. This design can handle 40dBm continuous wave (CW) input power within a small dimension of 5.0 mm × 2.7 mm, which is suitable for 5G communication, satellite communication, radar, medical field and other applications.