A Dual Mode SAR ADC with Oversampling and Dithering for Extended Accuracy

This paper presents a 12/10/8/6-bit successive approximation register (SAR) analog-to-digital converter (ADC) which is compatible with single-ended mode with only one set of SAR logic. Oversampling, dithering and dynamic element matching (DEM) techniques are combined to increase both SNR and linearity to extend accuracy. The proposed ADC is implemented in a 110nm CMOS technology and the total area is 0.194mm
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• At 1MS/s and VREF=3.3V, ENOB is 11.05b, SFDR is 89.91dB when the input amplitude is 2.97V (-1dBFS) while consuming 742.6uW. The application of DEM helps improve the SFDR by about 4dB. The measured DNL and INL are +/-0.65LSB and +/-1.14LSB respectively. At an oversampling ratio (OSR) of 64, the SAR ADC achieves the ENOB of 13.5b and dither helps improve the absolute accuracy of the DC signal.