An Efficient VLSI Architecture for Analysis of Area, Delay and Power Consumption-A Review

Across many computers and other types of processors, adders are used to calculate addresses and other related tasks, to compute table indices in the Arithmetic Logic Unit (ALU), and in other processor sections. The performance and effectiveness of the adders are fundamental to the system as a whole. Research for designing adders that consume less power, occupies small area and that which operate at high speed is still underway. The adder topologies presented in this work are Ripple Carry Adder, Carry Look-Ahead Adder, Carry Skip Adder and Carry Save Adder. The performance factors like area, delay and power consumption were analysed using simulation tools Cadence and Microwind.