Supply Noise and Peak Current Reduction in High-Speed Output Drivers

A circuit is proposed in this paper to reduce simultaneous switching noise (SSN) in high speed I/Os and address the issue of high peak currents of the driver. The circuit is implemented in 16nm FinFET process with 1.8V IO device. SSN and peak currents are reduced without affecting speed. The proposed circuit achieves 6.7% reduction in supply dip, 8.0% reduction in ground bounce and 20% reduction in peak current without compromising on performance compared with a commonly used method to address SSN. The proposed solution can be used in any CMOS output buffer as a simple and area effective implementation to address SSN and high peak currents.