A High-Speed MCML Logic Gate and Multiplexer Design in 45 nm CMOS Technology

Current Mode Logic (CML) is generally utilized for high-speed circuits. This is a differential digital logic used to design inverters, buffers and gates, as well as the board-level signaling of digital data. Among the various types of CML circuits, in various digital circuit designs, MOS Current Mode Logic (MCML) is generally implemented. This logic can also be used to design registers and memory units. In this paper, a novel MOS CML circuit is designed using a flipped voltage follower-based tri-state circuit for Inverter/Buffer and AND/NAND logic and also for the high-speed multiplexer. The proposed MCML logic gate is analyzed using the Cadence virtuoso tool in 45 nm technology at 1V power supply and a temperature of 27°C. The results are verified with Monte Carlo simulations using a histogram plot. The process variations for different corners are simulated and compared for the conventional, existing and proposed structures under 45 nm CMOS technology. The result proves that the proposed circuit provides high performance and operates in a high-speed environment.