A Single-Stage Power Efficient MMIC Based Frequency Multiplier at the W-Band

In this work, a frequency doubler is presented using a single pHEMT with 0.1 μm gate-length for W-band applications. Harmonic mixing technique has been employed for properly terminating the device to enhance the required harmonic signal at the output. A comparison with other frequency multipliers using much shorter gate length shows comparable results. Superior performance has been achieved by minimalistic approach in designing the biasing, matching and filtering circuits. Power is also recovered from the harmonic frequencies that minimizes conversion loss. The fabricated MMIC doubler has achieved a minimum conversion loss of 16 dB over 88–100 GHz with 10 dBm of input power. The circuit consumes only 50 mW of DC power. Spurious rejection of the circuit is at least 50 dBc. Output spectrum obtained through testing of the fabricated MMIC based frequency multiplier is very stable and the spectral purity is also appreciably good. Therefore, the multiplier MMIC is useful for the development of high quality MMW transceivers.