Implementation of High Gain and High Bandwidth CMOS Op-Amp using 180nm SCL Technology

Complementary Metal Oxide Semiconductor (CMOS) technology is gradually scaled down to provide a high-speed, low-power, high-density, and low-cost digital system. Due to the CMOS technology’s quick progress, single-chip solutions are starting to look appealing for systems that are getting more complicated. One of the most fundamental elements in analog IC design is the operational amplifier (Op-Amp), the most flexible and often utilized element in electronic devices. Op amps are essential building elements in many analog subsystems, including analog-to-digital converters, switched-capacitor filters, digital-to-analog converters, regulators, and voltage references. Many different electrical applications deal with inputs from low signals, including biomedical signals. These systems require certain amplifiers, which must have significant gains and wide bandwidths. This work presents the design and analysis of a regular purpose CMOS amplifier using 180 nm SCL Technology node to simultaneously achieve very high gain and high bandwidth. With a load capacitance of 100 fF and a supply voltage of 1.8 V, we performed a gain of over 60 dB and a bandwidth of 1 GHz after simulating the Cadence environment for the 180 nm SCL technology node. Our proposed op-amp has been tested for the different temperature ranges of 0
^o
C to 80
^o
C and in various process states like NN, SS, and FF where it is functional across all these ranges and finally compared with existing relevant works.