Optimization Design of Silicon Carbide Power Module Based on Neural Network

Compared with Silicon materials, Silicon Carbide (SiC) devices are widely used due to their advantages of higher voltage resistance, higher temperature resistance, faster switching speed and bottom loss. Due to the low current carrying capacity of a single SiC chip, it is often necessary to apply multiple chips in parallel to improve the power level of the module. For the multi-chip parallel module, the size of Direct Bonded Copper (DBC) and the layout of the chip have great influence on the parasitic inductance and thermal performance of the module, so it is necessary to optimize the electro-thermal performance of the module. At present, multi-chip SiC power module can be characterized by the finite element simulation software of multi-physical field, and then the multi-chip power package design. However, the optimization design of module package by finite element simulation software needs a lot of parametric simulation, which costs much simulation time and reduces the design efficiency. Therefore, an automatic design method is urgently needed to accelerate the design cycle of the SiC power module, reduce the inductance, improve the heat dissipation efficiency and give full play to the performance of the SiC device. Firstly, taking a multi-chip parallel SiC Power Module as an example, the parasitic inductance and temperature distribution of the module were simulated and analyzed based on ANSYS Q3D and COMSOL. Secondly, Artificial Neural Network (ANN) is trained with DBC size and chip spacing as input variables, parasitic inductance and maximum junction temperature as output data, and the relationship between input and output is obtained. That is, the inductance and junction temperature of the module can be quickly obtained by directly inputting variables such as size. Finally, the root mean square error is less than 2 when comparing the finite element simulation results with the ANN training results under the same variables, which verifies the validity of the method.