Analog/RF Performance Analysis of a Novel Si0.9Ge0.1/InAs Charge Plasma-Based Junctionless TFET

In this article, a simulated Si0.1Ge0.9/InAs dual material gate hetero-structure junctionless tunnel field effect transistor (DMG-HJLTFET) is proposed for the first time. The performance of the drain current is improved by combining a Si
1-x
Ge
x
(x=0.1) source with an InAs channel along with a combination of HfO
2
(k=29) and SiO
2
(k=3.9) dielectric at the gate. Analog/RF performance of the proposed device such as on-state current (I
ON
), transconductance (g
m
), total parasitic capacitance (C
gg
), maximum oscillation frequency (fmax), gain bandwidth product (GBP), transconductance frequency product (TFP), and intrinsic delay (τ) have been examined and also compared with the traditional Si-JLTFET considering exact dimensions as that of DMG-HJLTFET and found superior. Therefore DMG-HJLTFET seems to be an adequate substitute for high-frequency and low-power applications.